vhdl - Procedures declaration -

i know if there functional differences between following procedure declaration :

procedure spi_write_bus ( spi_data_mosi       : in data_burst; spi_data_miso       : in data_burst; spi_data_lenght     : in natural;  signal spi_mosi     : out std_logic; signal spi_miso     : out std_logic; signal spi_clk_en   : out std_logic; signal spi_cs       : out std_logic; signal spi_clk_i    : in std_logic   );   procedure spi_write_bus ( signal spi_data_mosi        : in data_burst; signal spi_data_miso        : in data_burst; signal spi_data_lenght      : in natural;  signal spi_mosi     : out std_logic; signal spi_miso     : out std_logic; signal spi_clk_en   : out std_logic; signal spi_cs       : out std_logic; signal spi_clk_i    : in std_logic   ); 

i've tryed find infos, maybe don't know can that. reply

the vhdl-2008 standard describes in "4.2.2.1 formal parameter lists":

for parameters modes, modes allowed formal parameters of procedure in, inout, , out. if mode in , no object class explicitly specified, constant assumed. if mode inout or out, , no object class explicitly specified, variable assumed.

since mode of spi_data_mosi in, in first case no explicit object class constant class assumed, while in second case class explicitly give signal.

the vhdl-2008 describes later in "4.2.2.1 formal parameter lists";

in subprogram call, actual designator (see 6.5.7.1) associated formal parameter of class signal shall name denoting signal. actual designator associated formal of class variable shall name denoting variable. actual designator associated formal of class constant shall expression.

this gives background brian drummonds comment, since parameters of class signal or variable requires formal of same class, parameters of class constant requires expression, can created using literals, signals, , variables.